matos/arch/x86/irq_pit.S
2021-11-03 09:53:38 +01:00

63 lines
1.3 KiB
ArmAsm

#define ASM_SOURCE 1
#include "segment.h"
.file "irq_pit.S"
.text
.extern switchKthread
.globl pit_handler
.type pit_handler, @function
pit_handler: // already got eflags, cs and eip on stack thanks to CPU
pushl $0 // err_code esp+12+7*4=40
pushl %ebp
movl %esp, %ebp
pushl %eax
pushl %ecx
pushl %edx
pushl %ebx
pushl %esi
pushl %edi
subl $2, %esp // (alignment) esp+10
pushw %ss // esp+8
pushw %ds // esp+6
pushw %es // esp+4
pushw %fs // esp+2
pushw %gs // esp
/* Set correct kernel segment descriptors' value */
movw $BUILD_SEGMENT_REG_VALUE(0, 0, SEG_KDATA), %di
pushw %di ; popw %ds
pushw %di ; popw %es
pushw %di ; popw %fs
pushw %di ; popw %gs
/* Send EOI to PIC */
movb $0x20, %al
outb %al, $0x20
pushl %esp
call pitIrqHandler
addl $4, %esp
movl %eax,%esp
/* Restore the CPU context */
popw %gs
popw %fs
popw %es
popw %ds
popw %ss
addl $2,%esp
popl %edi
popl %esi
popl %ebx
popl %edx
popl %ecx
popl %eax
popl %ebp
addl $4, %esp /* Ignore "error code" */
/* This restores the eflags, the cs and the eip registers */
iret /* equivalent to: popfl ; ret */