2021-11-02 21:24:12 +01:00
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#define ASM_SOURCE 1
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#include "segment.h"
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2020-04-23 00:49:09 +02:00
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.file "irq_pit.S"
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.text
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2020-04-23 23:40:16 +02:00
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.extern switchKthread
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2020-04-23 00:49:09 +02:00
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.globl pit_handler
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.type pit_handler, @function
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pit_handler: // already got eflags, cs and eip on stack thanks to CPU
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2021-10-26 20:55:15 +02:00
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pushl $0 // err_code esp+12+7*4=40
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pushl %ebp
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2021-11-02 23:05:56 +01:00
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movl %esp, %ebp
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2021-10-26 20:55:15 +02:00
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pushl %eax
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pushl %ecx
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pushl %edx
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pushl %ebx
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pushl %esi
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pushl %edi
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2020-04-23 00:49:09 +02:00
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subl $2, %esp // (alignment) esp+10
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pushw %ss // esp+8
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pushw %ds // esp+6
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pushw %es // esp+4
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pushw %fs // esp+2
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pushw %gs // esp
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2021-11-02 21:24:12 +01:00
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/* Set correct kernel segment descriptors' value */
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movw $BUILD_SEGMENT_REG_VALUE(0, 0, SEG_KDATA), %di
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pushw %di ; popw %ds
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pushw %di ; popw %es
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pushw %di ; popw %fs
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pushw %di ; popw %gs
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2020-04-23 00:49:09 +02:00
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/* Send EOI to PIC */
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movb $0x20, %al
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outb %al, $0x20
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pushl %esp
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2020-04-27 23:08:36 +02:00
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call pitIrqHandler
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2021-11-02 23:22:24 +01:00
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addl $4, %esp
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2020-04-23 00:49:09 +02:00
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movl %eax,%esp
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/* Restore the CPU context */
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popw %gs
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popw %fs
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popw %es
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popw %ds
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popw %ss
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addl $2,%esp
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2021-10-26 20:55:15 +02:00
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popl %edi
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popl %esi
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popl %ebx
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popl %edx
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popl %ecx
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popl %eax
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popl %ebp
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2020-04-23 00:49:09 +02:00
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addl $4, %esp /* Ignore "error code" */
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/* This restores the eflags, the cs and the eip registers */
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iret /* equivalent to: popfl ; ret */
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