esp and ss are push for x86_64

arch/x86/interrupt.h

@@ -6,9 +6,7 @@ struct interrupt_frame {
     uint32_t eip;
     uint32_t cs;
     uint32_t eflags;
-    uint32_t esp;
+} __attribute__((packed));
-    uint32_t ss;
-};
 
 // Exception
 #define DECLARE_INTERRUPT(int_nb)                                                             \

arch/x86/irq_wrappers.S

@@ -0,0 +1,49 @@
+#define ASM_SOURCE 1
+.file "irq_wrappers.S"
+.text
+
+.extern interrupt_handler_pic
+.globl irq_handler_wrapper_array
+
+.altmacro
+
+
+.macro interrupt_pic irq
+    int_wrapper_\irq:
+    .type int_wrapper_\irq,@function
+        /* INTERRUPT FRAME START */
+        /* ALREADY PUSHED TO US BY THE PROCESSOR UPON ENTRY TO THIS INTERRUPT */
+        /* uint32_t ip */
+        /* uint32_t cs; */
+        /* uint32_t flags */
+        /* uint32_t sp; */
+        /* uint32_t ss; */
+        /* Pushes the general purpose registers to the stack */
+        pushal
+        /* Interrupt frame end */
+        pushl %esp
+        pushl $\irq
+        call interrupt_handler_pic
+        addl $8, %esp
+        popal
+        iret
+.endm
+
+.set i, 0
+.rept 0x10
+    interrupt_pic %i
+    .set i, i+1
+.endr
+
+.macro ref_int_wrapper irq
+    .long int_wrapper_\irq
+.endm
+
+.section ".rodata"
+.p2align 5, 0x0
+irq_handler_wrapper_array:
+.set i, 0x0
+.rept 0x10
+    ref_int_wrapper %i
+    .set i, i+1
+.endr