From d2417ef349a0bf07b21c01f56740d415b3824aab Mon Sep 17 00:00:00 2001
From: Mathieu Maret <mathieu.maret@gmail.com>
Date: Thu, 7 Oct 2021 21:53:25 +0200
Subject: [PATCH] esp and ss are push for x86_64

---
 arch/x86/interrupt.h    |  4 +---
 arch/x86/irq_wrappers.S | 49 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+), 3 deletions(-)
 create mode 100644 arch/x86/irq_wrappers.S

diff --git a/arch/x86/interrupt.h b/arch/x86/interrupt.h
index 3c0c49f..9a98439 100644
--- a/arch/x86/interrupt.h
+++ b/arch/x86/interrupt.h
@@ -6,9 +6,7 @@ struct interrupt_frame {
     uint32_t eip;
     uint32_t cs;
     uint32_t eflags;
-    uint32_t esp;
-    uint32_t ss;
-};
+} __attribute__((packed));
 
 // Exception
 #define DECLARE_INTERRUPT(int_nb)                                                             \
diff --git a/arch/x86/irq_wrappers.S b/arch/x86/irq_wrappers.S
new file mode 100644
index 0000000..1cfe133
--- /dev/null
+++ b/arch/x86/irq_wrappers.S
@@ -0,0 +1,49 @@
+#define ASM_SOURCE 1
+.file "irq_wrappers.S"
+.text
+
+.extern interrupt_handler_pic
+.globl irq_handler_wrapper_array
+
+.altmacro
+
+
+.macro interrupt_pic irq
+    int_wrapper_\irq:
+    .type int_wrapper_\irq,@function
+        /* INTERRUPT FRAME START */
+        /* ALREADY PUSHED TO US BY THE PROCESSOR UPON ENTRY TO THIS INTERRUPT */
+        /* uint32_t ip */
+        /* uint32_t cs; */
+        /* uint32_t flags */
+        /* uint32_t sp; */
+        /* uint32_t ss; */
+        /* Pushes the general purpose registers to the stack */
+        pushal
+        /* Interrupt frame end */
+        pushl %esp
+        pushl $\irq
+        call interrupt_handler_pic
+        addl $8, %esp
+        popal
+        iret
+.endm
+
+.set i, 0
+.rept 0x10
+    interrupt_pic %i
+    .set i, i+1
+.endr
+
+.macro ref_int_wrapper irq
+    .long int_wrapper_\irq
+.endm
+
+.section ".rodata"
+.p2align 5, 0x0
+irq_handler_wrapper_array:
+.set i, 0x0
+.rept 0x10
+    ref_int_wrapper %i
+    .set i, i+1
+.endr