408 lines
12 KiB
C
408 lines
12 KiB
C
/* Copyright (C) 2005 David Decotigny
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Copyright (C) 2000-2004, The KOS team
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
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USA.
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*/
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#include <sos/assert.h>
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#include <sos/klibc.h>
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#include <drivers/bochs.h>
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#include <drivers/x86_videomem.h>
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#include <hwcore/segment.h>
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#include "cpu_context.h"
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/**
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* Here is the definition of a CPU context for IA32 processors. This
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* is a SOS convention, not a specification given by the IA32
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* spec. However there is a strong constraint related to the x86
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* interrupt handling specification: the top of the stack MUST be
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* compatible with the 'iret' instruction, ie there must be the
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* err_code (might be 0), eip, cs and eflags of the destination
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* context in that order (see Intel x86 specs vol 3, figure 5-4).
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*
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* @note IMPORTANT: This definition MUST be consistent with the way
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* the registers are stored on the stack in
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* irq_wrappers.S/exception_wrappers.S !!! Hence the constraint above.
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*/
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struct sos_cpu_state {
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/* (Lower addresses) */
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/* These are SOS convention */
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sos_ui16_t gs;
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sos_ui16_t fs;
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sos_ui16_t es;
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sos_ui16_t ds;
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sos_ui16_t cpl0_ss; /* This is ALWAYS the Stack Segment of the
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Kernel context (CPL0) of the interrupted
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thread, even for a user thread */
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sos_ui16_t alignment_padding; /* unused */
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sos_ui32_t eax;
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sos_ui32_t ebx;
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sos_ui32_t ecx;
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sos_ui32_t edx;
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sos_ui32_t esi;
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sos_ui32_t edi;
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sos_ui32_t ebp;
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/* MUST NEVER CHANGE (dependent on the IA32 iret instruction) */
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sos_ui32_t error_code;
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sos_vaddr_t eip;
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sos_ui32_t cs; /* 32bits according to the specs ! However, the CS
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register is really 16bits long */
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sos_ui32_t eflags;
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/* (Higher addresses) */
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} __attribute__((packed));
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/**
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* The CS value pushed on the stack by the CPU upon interrupt, and
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* needed by the iret instruction, is 32bits long while the real CPU
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* CS register is 16bits only: this macro simply retrieves the CPU
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* "CS" register value from the CS value pushed on the stack by the
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* CPU upon interrupt.
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*
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* The remaining 16bits pushed by the CPU should be considered
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* "reserved" and architecture dependent. IMHO, the specs don't say
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* anything about them. Considering that some architectures generate
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* non-zero values for these 16bits (at least Cyrix), we'd better
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* ignore them.
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*/
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#define GET_CPU_CS_REGISTER_VALUE(pushed_ui32_cs_value) \
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( (pushed_ui32_cs_value) & 0xffff )
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/**
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* Structure of an interrupted Kernel thread's context
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*/
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struct sos_cpu_kstate
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{
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struct sos_cpu_state regs;
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} __attribute__((packed));
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/**
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* THE main operation of a kernel thread. This routine calls the
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* kernel thread function start_func and calls exit_func when
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* start_func returns.
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*/
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static void core_routine (sos_cpu_kstate_function_arg1_t *start_func,
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sos_ui32_t start_arg,
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sos_cpu_kstate_function_arg1_t *exit_func,
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sos_ui32_t exit_arg)
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__attribute__((noreturn));
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static void core_routine (sos_cpu_kstate_function_arg1_t *start_func,
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sos_ui32_t start_arg,
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sos_cpu_kstate_function_arg1_t *exit_func,
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sos_ui32_t exit_arg)
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{
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start_func(start_arg);
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exit_func(exit_arg);
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SOS_ASSERT_FATAL(! "The exit function of the thread should NOT return !");
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for(;;);
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}
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sos_ret_t sos_cpu_kstate_init(struct sos_cpu_state **ctxt,
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sos_cpu_kstate_function_arg1_t *start_func,
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sos_ui32_t start_arg,
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sos_vaddr_t stack_bottom,
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sos_size_t stack_size,
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sos_cpu_kstate_function_arg1_t *exit_func,
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sos_ui32_t exit_arg)
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{
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/* We are initializing a Kernel thread's context */
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struct sos_cpu_kstate *kctxt;
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/* This is a critical internal function, so that it is assumed that
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the caller knows what he does: we legitimally assume that values
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for ctxt, start_func, stack_* and exit_func are allways VALID ! */
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/* Setup the stack.
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*
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* On x86, the stack goes downward. Each frame is configured this
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* way (higher addresses first):
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*
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* - (optional unused space. As of gcc 3.3, this space is 24 bytes)
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* - arg n
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* - arg n-1
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* - ...
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* - arg 1
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* - return instruction address: The address the function returns to
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* once finished
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* - local variables
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*
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* The remaining of the code should be read from the end upward to
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* understand how the processor will handle it.
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*/
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sos_vaddr_t tmp_vaddr = stack_bottom + stack_size;
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sos_ui32_t *stack = (sos_ui32_t*)tmp_vaddr;
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/* If needed, poison the stack */
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#ifdef SOS_CPU_STATE_DETECT_UNINIT_KERNEL_VARS
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memset((void*)stack_bottom, SOS_CPU_STATE_STACK_POISON, stack_size);
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#elif defined(SOS_CPU_STATE_DETECT_KERNEL_STACK_OVERFLOW)
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sos_cpu_state_prepare_detect_kernel_stack_overflow(stack_bottom, stack_size);
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#endif
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/* Simulate a call to the core_routine() function: prepare its
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arguments */
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*(--stack) = exit_arg;
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*(--stack) = (sos_ui32_t)exit_func;
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*(--stack) = start_arg;
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*(--stack) = (sos_ui32_t)start_func;
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*(--stack) = 0; /* Return address of core_routine => force page fault */
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/*
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* Setup the initial context structure, so that the CPU will execute
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* the function core_routine() once this new context has been
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* restored on CPU
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*/
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/* Compute the base address of the structure, which must be located
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below the previous elements */
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tmp_vaddr = ((sos_vaddr_t)stack) - sizeof(struct sos_cpu_kstate);
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kctxt = (struct sos_cpu_kstate*)tmp_vaddr;
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/* Initialize the CPU context structure */
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memset(kctxt, 0x0, sizeof(struct sos_cpu_kstate));
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/* Tell the CPU context structure that the first instruction to
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execute will be that of the core_routine() function */
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kctxt->regs.eip = (sos_ui32_t)core_routine;
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/* Setup the segment registers */
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kctxt->regs.cs
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= SOS_BUILD_SEGMENT_REG_VALUE(0, FALSE, SOS_SEG_KCODE); /* Code */
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kctxt->regs.ds
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= SOS_BUILD_SEGMENT_REG_VALUE(0, FALSE, SOS_SEG_KDATA); /* Data */
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kctxt->regs.es
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= SOS_BUILD_SEGMENT_REG_VALUE(0, FALSE, SOS_SEG_KDATA); /* Data */
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kctxt->regs.cpl0_ss
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= SOS_BUILD_SEGMENT_REG_VALUE(0, FALSE, SOS_SEG_KDATA); /* Stack */
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/* fs and gs unused for the moment. */
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/* The newly created context is initially interruptible */
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kctxt->regs.eflags = (1 << 9); /* set IF bit */
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/* Finally, update the generic kernel/user thread context */
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*ctxt = (struct sos_cpu_state*) kctxt;
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return SOS_OK;
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}
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#if defined(SOS_CPU_STATE_DETECT_KERNEL_STACK_OVERFLOW)
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void
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sos_cpu_state_prepare_detect_kernel_stack_overflow(const struct sos_cpu_state *ctxt,
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sos_vaddr_t stack_bottom,
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sos_size_t stack_size)
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{
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sos_size_t poison_size = SOS_CPU_STATE_DETECT_KERNEL_STACK_OVERFLOW;
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if (poison_size > stack_size)
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poison_size = stack_size;
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memset((void*)stack_bottom, SOS_CPU_STATE_STACK_POISON, poison_size);
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}
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void
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sos_cpu_state_detect_kernel_stack_overflow(const struct sos_cpu_state *ctxt,
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sos_vaddr_t stack_bottom,
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sos_size_t stack_size)
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{
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unsigned char *c;
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int i;
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/* On SOS, "ctxt" corresponds to the address of the esp register of
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the saved context in Kernel mode (always, even for the interrupted
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context of a user thread). Here we make sure that this stack
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pointer is within the allowed stack area */
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SOS_ASSERT_FATAL(((sos_vaddr_t)ctxt) >= stack_bottom);
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SOS_ASSERT_FATAL(((sos_vaddr_t)ctxt) + sizeof(struct sos_cpu_kstate)
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<= stack_bottom + stack_size);
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/* Check that the bottom of the stack has not been altered */
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for (c = (unsigned char*) stack_bottom, i = 0 ;
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(i < SOS_CPU_STATE_DETECT_KERNEL_STACK_OVERFLOW) && (i < stack_size) ;
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c++, i++)
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{
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SOS_ASSERT_FATAL(SOS_CPU_STATE_STACK_POISON == *c);
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}
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}
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#endif
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/* =======================================================================
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* Public Accessor functions
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*/
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sos_vaddr_t sos_cpu_context_get_PC(const struct sos_cpu_state *ctxt)
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{
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SOS_ASSERT_FATAL(NULL != ctxt);
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/* This is the PC of the interrupted context (ie kernel or user
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context). */
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return ctxt->eip;
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}
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sos_vaddr_t sos_cpu_context_get_SP(const struct sos_cpu_state *ctxt)
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{
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SOS_ASSERT_FATAL(NULL != ctxt);
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/* On SOS, "ctxt" corresponds to the address of the esp register of
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the saved context in Kernel mode (always, even for the interrupted
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context of a user thread). */
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return (sos_vaddr_t)ctxt;
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}
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void sos_cpu_context_dump(const struct sos_cpu_state *ctxt)
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{
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char buf[128];
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snprintf(buf, sizeof(buf),
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"CPU: eip=%x esp=%x eflags=%x cs=%x ds=%x ss=%x err=%x",
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(unsigned)ctxt->eip, (unsigned)ctxt, (unsigned)ctxt->eflags,
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(unsigned)GET_CPU_CS_REGISTER_VALUE(ctxt->cs), (unsigned)ctxt->ds,
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(unsigned)ctxt->cpl0_ss,
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(unsigned)ctxt->error_code);
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sos_bochs_putstring(buf); sos_bochs_putstring("\n");
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sos_x86_videomem_putstring(23, 0,
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SOS_X86_VIDEO_FG_BLACK | SOS_X86_VIDEO_BG_LTGRAY,
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buf);
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}
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/* =======================================================================
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* Public Accessor functions TO BE USED ONLY BY Exception handlers
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*/
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sos_ui32_t sos_cpu_context_get_EX_info(const struct sos_cpu_state *ctxt)
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{
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SOS_ASSERT_FATAL(NULL != ctxt);
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return ctxt->error_code;
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}
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sos_vaddr_t
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sos_cpu_context_get_EX_faulting_vaddr(const struct sos_cpu_state *ctxt)
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{
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sos_ui32_t cr2;
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/*
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* See Intel Vol 3 (section 5.14): the address of the faulting
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* virtual address of a page fault is stored in the cr2
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* register.
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*
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* Actually, we do not store the cr2 register in a saved
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* kernel thread's context. So we retrieve the cr2's value directly
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* from the processor. The value we retrieve in an exception handler
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* is actually the correct one because an exception is synchronous
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* with the code causing the fault, and cannot be interrupted since
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* the IDT entries in SOS are "interrupt gates" (ie IRQ are
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* disabled).
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*/
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asm volatile ("movl %%cr2, %0"
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:"=r"(cr2)
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: );
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return cr2;
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}
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/* =======================================================================
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* Backtrace facility. To be used for DEBUGging purpose ONLY.
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*/
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sos_ui32_t sos_backtrace(const struct sos_cpu_state *cpu_state,
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sos_ui32_t max_depth,
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sos_vaddr_t stack_bottom,
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sos_size_t stack_size,
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sos_backtrace_callback_t * backtracer,
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void *custom_arg)
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{
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int depth;
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sos_vaddr_t callee_PC, caller_frame;
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/*
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* Layout of a frame on the x86 (compiler=gcc):
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*
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* funcA calls funcB calls funcC
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*
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* ....
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* funcB Argument 2
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* funcB Argument 1
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* funcA Return eip
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* frameB: funcA ebp (ie previous stack frame)
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* ....
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* (funcB local variables)
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* ....
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* funcC Argument 2
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* funcC Argument 1
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* funcB Return eip
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* frameC: funcB ebp (ie previous stack frame == A0) <---- a frame address
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* ....
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* (funcC local variables)
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* ....
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*
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* The presence of "ebp" on the stack depends on 2 things:
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* + the compiler is gcc
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* + the source is compiled WITHOUT the -fomit-frame-pointer option
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* In the absence of "ebp", chances are high that the value pushed
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* at that address is outside the stack boundaries, meaning that the
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* function will return -SOS_ENOSUP.
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*/
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if (cpu_state)
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{
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callee_PC = cpu_state->eip;
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caller_frame = cpu_state->ebp;
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}
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else
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{
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/* Skip the sos_backtrace() frame */
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callee_PC = (sos_vaddr_t)__builtin_return_address(0);
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caller_frame = (sos_vaddr_t)__builtin_frame_address(1);
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}
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for(depth=0 ; depth < max_depth ; depth ++)
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{
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/* Call the callback */
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backtracer(callee_PC, caller_frame + 8, depth, custom_arg);
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/* If the frame address is funky, don't go further */
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if ( (caller_frame < stack_bottom)
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|| (caller_frame + 4 >= stack_bottom + stack_size) )
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return depth;
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/* Go to caller frame */
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callee_PC = *((sos_vaddr_t*) (caller_frame + 4));
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caller_frame = *((sos_vaddr_t*) caller_frame);
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}
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return depth;
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}
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