Add setClock
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c74d43e140
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51
clock.c
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51
clock.c
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@ -0,0 +1,51 @@
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#include "clock.h"
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#include "mbox.h"
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#include "uart.h"
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unsigned int getclock(uint32_t clkid, uint8_t max) {
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mbox[0] = 8 * 4;
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mbox[1] = MBOX_REQUEST;
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mbox[2] = max > 0 ? MBOX_TAG_GETMAXCLK : MBOX_TAG_GETCLK;
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mbox[3] = 8;
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mbox[4] = 0;
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mbox[5] = clkid;
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mbox[6] = 0;
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mbox[7] = MBOX_TAG_LAST;
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if (mbox_call(MBOX_CH_PROP, mbox)) {
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puts("Failed getting clock\n");
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return 0;
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} else {
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return mbox[6];
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}
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}
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int setmaxclock(uint32_t clkid)
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{
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uint32_t maxfreq = getclock(clkid, 1);
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if (maxfreq != 0) {
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return setclock(clkid, maxfreq);
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}
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return -1;
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}
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int setclock(uint32_t clkid, uint32_t freq)
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{
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mbox[0] = 9 * 4;
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mbox[1] = MBOX_REQUEST;
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mbox[2] = MBOX_TAG_SETCLK;
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mbox[3] = 12;
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mbox[4] = 0;
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mbox[5] = clkid;
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mbox[6] = freq;
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mbox[7] = 0;
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mbox[8] = MBOX_TAG_LAST;
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if (mbox_call(MBOX_CH_PROP, mbox)) {
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puts("Failed setting clock\n");
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return -1;
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}
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return 0;
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}
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21
clock.h
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21
clock.h
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@ -0,0 +1,21 @@
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#pragma once
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#include <stdint.h>
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#define CLK_EMMC 0x00000001
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#define CLK_UART 0x00000002
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#define CLK_ARM 0x00000003
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#define CLK_CORE 0x00000004
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#define CLK_V3D 0x00000005
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#define CLK_H264 0x00000006
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#define CLK_ISP 0x00000007
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#define CLK_SDRAM 0x00000008
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#define CLK_PIXEL 0x00000009
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#define CLK_PWM 0x0000000a
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#define CLK_HEVC 0x0000000b
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#define CLK_EMMC2 0x0000000c
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#define CLK_M2MC 0x0000000d
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#define CLK_PIXEL_BVB 0x0000000e
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unsigned int getclock(uint32_t clkid, uint8_t max);
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int setmaxclock(uint32_t clkid);
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int setclock(uint32_t clkid, uint32_t freq);
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16
delay.c
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16
delay.c
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@ -0,0 +1,16 @@
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#include "delay.h"
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#include "mmio.h"
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#define STC_LOW (*(volatile unsigned *)(IO_BASE + 0x3004))
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#define STC_HIGH (*(volatile unsigned *)(IO_BASE + 0x3008))
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uint64_t micros() {
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uint32_t high, low;
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high = STC_HIGH;
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low = STC_LOW;
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if (high != STC_HIGH) {
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high = STC_HIGH;
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low = STC_LOW;
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}
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return ((uint64_t)high) << 32 | low;
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}
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2
fb.c
2
fb.c
@ -50,7 +50,7 @@ unsigned char *init_fb(struct fbst *fb) {
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mbox[33] = 0; // FrameBufferInfo.pitch
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mbox[34] = MBOX_TAG_LAST;
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if (mbox_call(MBOX_CH_PROP, mbox) && mbox[20] == 32 && mbox[28] != 0) {
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if (mbox_call(MBOX_CH_PROP, mbox) == 0 && mbox[20] == 32 && mbox[28] != 0) {
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mbox[28] &= 0x3FFFFFFF; // convert GPU address to ARM address
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fb->width = mbox[5]; // get actual physical width
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fb->height = mbox[6]; // get actual physical height
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32
hello.c
32
hello.c
@ -7,7 +7,7 @@ struct fbst fb;
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int kernelmain(void)
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{
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init_uart();
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if (init_fb(&fb) == 0){
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if (init_fb(&fb) == 0) {
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puts("Fail to init framebuffer");
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}
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mbox[0] = 8 * 4;
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@ -19,7 +19,7 @@ int kernelmain(void)
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mbox[6] = 0;
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mbox[7] = MBOX_TAG_LAST;
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if (mbox_call(MBOX_CH_PROP, mbox)) {
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if (!mbox_call(MBOX_CH_PROP, mbox)) {
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puts("videocore start at 0x");
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printhex(mbox[5]);
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puts(" - ");
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@ -30,20 +30,22 @@ int kernelmain(void)
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puts("Error getting videocore mem\n");
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}
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unsigned char *ptr=fb.fbp;
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printclock();
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for(int y=0; y<fb.height; y++) {
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for(int x=0; x<fb.width; x++) {
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if(y%60==0)
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*((unsigned int*)ptr)=0x00FF0000;
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else if (y%40==0)
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*((unsigned int*)ptr)=0x0000FF00;
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else if (y%20==0)
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*((unsigned int*)ptr)=0x000000FF;
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else
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*((unsigned int*)ptr)=0x00000000;
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ptr+=4;
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}
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unsigned char *ptr = fb.fbp;
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for (unsigned int y = 0; y < fb.height; y++) {
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for (unsigned int x = 0; x < fb.width; x++) {
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if (y % 60 == 0)
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*((unsigned int *)ptr) = 0x00FF0000;
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else if (y % 40 == 0)
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*((unsigned int *)ptr) = 0x0000FF00;
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else if (y % 20 == 0)
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*((unsigned int *)ptr) = 0x000000FF;
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else
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*((unsigned int *)ptr) = 0x00000000;
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ptr += 4;
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}
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}
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return 0;
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}
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7
mbox.c
7
mbox.c
@ -23,7 +23,8 @@
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// Should be allocated in the first 2^32bytes
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volatile uint32_t __attribute__((aligned(16))) mbox[36];
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int mbox_call(uint8_t ch, volatile uint32_t *box) {
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int mbox_call(uint8_t ch, volatile uint32_t *box)
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{
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// mbox is 16 aligned
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uint32_t r = (uint64_t)box | (ch & 0xF);
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while (*MBOX_STATUS & MBOX_FULL) {
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@ -36,8 +37,8 @@ int mbox_call(uint8_t ch, volatile uint32_t *box) {
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}
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if (r == *MBOX_READ)
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/* is it a valid successful response? */
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return box[1] == MBOX_RESPONSE;
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return box[1] == MBOX_RESPONSE ? 0 : -1;
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}
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return 0;
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return -1;
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}
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16
mbox.h
16
mbox.h
@ -27,14 +27,14 @@
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#define MBOX_CH_PROP 8 // Used for ARM to GPU
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/* tags */
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#define MBOX_TAG_GETSERIAL 0x00010004
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#define MBOX_TAG_GETARMMEM 0x00010005
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#define MBOX_TAG_GETVCOREMEM 0x00010006
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#define MBOX_TAG_GETCORETEMP 0x00030006
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#define MBOX_TAG_GETMAXCLK 0x00030004
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#define MBOX_TAG_GETCLK 0x00030047
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#define MBOX_TAG_SETCLK 0x00038002
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#define MBOX_TAG_LAST 0
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#define MBOX_TAG_GETSERIAL 0x00010004
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#define MBOX_TAG_GETARMMEM 0x00010005
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#define MBOX_TAG_GETVCOREMEM 0x00010006
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#define MBOX_TAG_GETCORETEMP 0x00030006
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#define MBOX_TAG_GETMAXCLK 0x00030004
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#define MBOX_TAG_GETCLK 0x00030047
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#define MBOX_TAG_SETCLK 0x00038002
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#define MBOX_TAG_LAST 0
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extern volatile unsigned int mbox[36];
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//box should be 16 aligned.
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19
utils.c
19
utils.c
@ -1,5 +1,6 @@
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#include <stdint.h>
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#include "uart.h"
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#include "clock.h"
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// K&R inspirated
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@ -52,3 +53,21 @@ void printdec(unsigned int d)
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putc(s[i]);
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}
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}
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void printclock()
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{
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static const char *clocktxts[] = {"reserved", "EMMC", "UART", "ARM", "CORE",
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"V3D", "H264", "ISP", "SDRAM", "PIXEL",
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"PWM", "HEVC", "EMMC2", "M2MC", "PIXEL_BVB"};
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puts("Clocks:\n");
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for(int i =1; i <= CLK_PIXEL_BVB; i++ ){
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puts(" ");
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puts(clocktxts[i]);
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puts(": ");
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printdec(getclock(i, 0));
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puts("/");
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printdec(getclock(i, 1));
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puts(" Hz\n");
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}
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}
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