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Rename IRQ exception base addr

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Mathieu Maret 2018-06-29 23:23:40 +02:00
parent 0d43780f35
commit 278ac9f816
3 changed files with 4 additions and 4 deletions
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2
irq.c
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@ -23,7 +23,7 @@ int irqSetRoutine(int irq, irq_handler handler)
if (handler != NULL) { if (handler != NULL) {
int ret = int ret =
idt_set_handler(IRQ_BASE_ADDRESS + irq, (unsigned int)irq_handler_array[irq], 0); idt_set_handler(IRQ_INTERRUPT_BASE_ADDRESS + irq, (unsigned int)irq_handler_array[irq], 0);
if (!ret) if (!ret)
enableIrq(irq); enableIrq(irq);
} }

2
irq.h
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@ -28,7 +28,7 @@
#define IRQ_HARDDISK 14 #define IRQ_HARDDISK 14
#define IRQ_RESERVED_5 15 #define IRQ_RESERVED_5 15
#define IRQ_BASE_ADDRESS 0x20 #define IRQ_INTERRUPT_BASE_ADDRESS 0x20
#define IRQ_NUM 16 #define IRQ_NUM 16
// An handler should finish by the iret opcode -> https://wiki.osdev.org/Interrupt_Service_Routines // An handler should finish by the iret opcode -> https://wiki.osdev.org/Interrupt_Service_Routines

4
pic.c
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@ -23,8 +23,8 @@ void initPic(void)
/* Send ICW2: ctrl base address. Remap IRQ from interupt range 0x0-0xF to 0x20-0x2F as /* Send ICW2: ctrl base address. Remap IRQ from interupt range 0x0-0xF to 0x20-0x2F as
* intel * intel
* reserve interupt 0x0-0x1F in protected mode (e.g. 0-7 are CPU exception) */ * reserve interupt 0x0-0x1F in protected mode (e.g. 0-7 are CPU exception) */
outb(IRQ_BASE_ADDRESS, PIC_MASTER_DATA); outb(IRQ_INTERRUPT_BASE_ADDRESS, PIC_MASTER_DATA);
outb(IRQ_BASE_ADDRESS + 8, PIC_SLAVE_DATA); outb(IRQ_INTERRUPT_BASE_ADDRESS + 8, PIC_SLAVE_DATA);
/* Send ICW3 master: mask where slaves are connected */ /* Send ICW3 master: mask where slaves are connected */
outb(0x4, PIC_MASTER_DATA); outb(0x4, PIC_MASTER_DATA);