3bca737990
This is taken from SOS
241 lines
8.1 KiB
C
241 lines
8.1 KiB
C
/* Copyright (C) 2005 David Decotigny
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Copyright (C) 2000-2004, The KOS team
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Initially taken from SOS
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*/
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#include "assert.h"
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#include "klibc.h"
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#include "segment.h"
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#include "cpu_context.h"
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/**
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* Here is the definition of a CPU context for IA32 processors. This
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* is a Matos/SOS convention, not a specification given by the IA32
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* spec. However there is a strong constraint related to the x86
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* interrupt handling specification: the top of the stack MUST be
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* compatible with the 'iret' instruction, ie there must be the
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* err_code (might be 0), eip, cs and eflags of the destination
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* context in that order (see Intel x86 specs vol 3, figure 5-4).
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*
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* @note IMPORTANT: This definition MUST be consistent with the way
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* the registers are stored on the stack in
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* irq_wrappers.S/exception_wrappers.S !!! Hence the constraint above.
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*/
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struct cpu_state {
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/* (Lower addresses) */
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/* These are Matos/SOS convention */
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uint16_t gs;
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uint16_t fs;
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uint16_t es;
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uint16_t ds;
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uint16_t cpl0_ss; /* This is ALWAYS the Stack Segment of the
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Kernel context (CPL0) of the interrupted
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thread, even for a user thread */
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uint16_t alignment_padding; /* unused */
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uint32_t eax;
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uint32_t ebx;
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uint32_t ecx;
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uint32_t edx;
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uint32_t esi;
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uint32_t edi;
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uint32_t ebp;
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/* MUST NEVER CHANGE (dependent on the IA32 iret instruction) */
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uint32_t error_code;
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vaddr_t eip;
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uint32_t cs; /* 32bits according to the specs ! However, the CS
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register is really 16bits long */
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uint32_t eflags;
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/* (Higher addresses) */
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} __attribute__((packed));
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/**
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* The CS value pushed on the stack by the CPU upon interrupt, and
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* needed by the iret instruction, is 32bits long while the real CPU
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* CS register is 16bits only: this macro simply retrieves the CPU
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* "CS" register value from the CS value pushed on the stack by the
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* CPU upon interrupt.
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*
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* The remaining 16bits pushed by the CPU should be considered
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* "reserved" and architecture dependent. IMHO, the specs don't say
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* anything about them. Considering that some architectures generate
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* non-zero values for these 16bits (at least Cyrix), we'd better
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* ignore them.
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*/
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#define GET_CPU_CS_REGISTER_VALUE(pushed_ui32_cs_value) ((pushed_ui32_cs_value)&0xffff)
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/**
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* Structure of an interrupted Kernel thread's context
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*/
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struct cpu_kstate {
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struct cpu_state regs;
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} __attribute__((packed));
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/**
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* THE main operation of a kernel thread. This routine calls the
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* kernel thread function start_func and calls exit_func when
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* start_func returns.
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*/
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static void core_routine(cpu_kstate_function_arg1_t *start_func, void *start_arg,
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cpu_kstate_function_arg1_t *exit_func, void *exit_arg)
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__attribute__((noreturn));
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static void core_routine(cpu_kstate_function_arg1_t *start_func, void *start_arg,
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cpu_kstate_function_arg1_t *exit_func, void *exit_arg)
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{
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start_func(start_arg);
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exit_func(exit_arg);
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assert(!"The exit function of the thread should NOT return !");
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for (;;)
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;
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}
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int cpu_kstate_init(struct cpu_state **ctxt, cpu_kstate_function_arg1_t *start_func,
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uint32_t start_arg, vaddr_t stack_bottom, size_t stack_size,
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cpu_kstate_function_arg1_t *exit_func, uint32_t exit_arg)
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{
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/* We are initializing a Kernel thread's context */
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struct cpu_kstate *kctxt;
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/* This is a critical internal function, so that it is assumed that
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the caller knows what he does: we legitimally assume that values
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for ctxt, start_func, stack_* and exit_func are allways VALID ! */
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/* Setup the stack.
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*
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* On x86, the stack goes downward. Each frame is configured this
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* way (higher addresses first):
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*
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* - (optional unused space. As of gcc 3.3, this space is 24 bytes)
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* - arg n
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* - arg n-1
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* - ...
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* - arg 1
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* - return instruction address: The address the function returns to
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* once finished
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* - local variables
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*
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* The remaining of the code should be read from the end upward to
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* understand how the processor will handle it.
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*/
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vaddr_t tmp_vaddr = stack_bottom + stack_size;
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uint32_t *stack = (uint32_t *)tmp_vaddr;
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/* If needed, poison the stack */
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#ifdef CPU_STATE_DETECT_UNINIT_KERNEL_VARS
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memset((void *)stack_bottom, CPU_STATE_STACK_POISON, stack_size);
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#elif defined(CPU_STATE_DETECT_KERNEL_STACK_OVERFLOW)
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cpu_state_prepare_detect_kernel_stack_overflow(stack_bottom, stack_size);
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#endif
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/* Simulate a call to the core_routine() function: prepare its
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arguments */
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*(--stack) = exit_arg;
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*(--stack) = (uint32_t)exit_func;
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*(--stack) = start_arg;
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*(--stack) = (uint32_t)start_func;
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*(--stack) = 0; /* Return address of core_routine => force page fault */
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/*
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* Setup the initial context structure, so that the CPU will execute
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* the function core_routine() once this new context has been
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* restored on CPU
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*/
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/* Compute the base address of the structure, which must be located
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below the previous elements */
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tmp_vaddr = ((vaddr_t)stack) - sizeof(struct cpu_kstate);
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kctxt = (struct cpu_kstate *)tmp_vaddr;
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/* Initialize the CPU context structure */
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memset(kctxt, 0x0, sizeof(struct cpu_kstate));
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/* Tell the CPU context structure that the first instruction to
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execute will be that of the core_routine() function */
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kctxt->regs.eip = (uint32_t)core_routine;
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/* Setup the segment registers */
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kctxt->regs.cs = BUILD_SEGMENT_REG_VALUE(0, FALSE, SEG_KCODE); /* Code */
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kctxt->regs.ds = BUILD_SEGMENT_REG_VALUE(0, FALSE, SEG_KDATA); /* Data */
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kctxt->regs.es = BUILD_SEGMENT_REG_VALUE(0, FALSE, SEG_KDATA); /* Data */
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kctxt->regs.cpl0_ss = BUILD_SEGMENT_REG_VALUE(0, FALSE, SEG_KDATA); /* Stack */
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/* fs and gs unused for the moment. */
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/* The newly created context is initially interruptible */
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kctxt->regs.eflags = (1 << 9); /* set IF bit */
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/* Finally, update the generic kernel/user thread context */
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*ctxt = (struct cpu_state *)kctxt;
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return 0;
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}
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#if defined(CPU_STATE_DETECT_KERNEL_STACK_OVERFLOW)
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void cpu_state_prepare_detect_kernel_stack_overflow(const struct cpu_state *ctxt,
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vaddr_t stack_bottom, size_t stack_size)
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{
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(void)ctxt;
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size_t poison_size = CPU_STATE_DETECT_KERNEL_STACK_OVERFLOW;
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if (poison_size > stack_size)
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poison_size = stack_size;
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memset((void *)stack_bottom, CPU_STATE_STACK_POISON, poison_size);
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}
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void cpu_state_detect_kernel_stack_overflow(const struct cpu_state *ctxt, vaddr_t stack_bottom,
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size_t stack_size)
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{
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unsigned char *c;
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size_t i;
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/* On Matos/SOS, "ctxt" corresponds to the address of the esp register of
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the saved context in Kernel mode (always, even for the interrupted
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context of a user thread). Here we make sure that this stack
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pointer is within the allowed stack area */
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assert(((vaddr_t)ctxt) >= stack_bottom);
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assert(((vaddr_t)ctxt) + sizeof(struct cpu_kstate) <= stack_bottom + stack_size);
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/* Check that the bottom of the stack has not been altered */
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for (c = (unsigned char *)stack_bottom, i = 0;
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(i < CPU_STATE_DETECT_KERNEL_STACK_OVERFLOW) && (i < stack_size); c++, i++) {
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assert(CPU_STATE_STACK_POISON == *c);
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}
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}
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#endif
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/* =======================================================================
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* Public Accessor functions
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*/
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vaddr_t cpu_context_get_PC(const struct cpu_state *ctxt)
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{
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assert(NULL != ctxt);
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/* This is the PC of the interrupted context (ie kernel or user
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context). */
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return ctxt->eip;
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}
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vaddr_t cpu_context_get_SP(const struct cpu_state *ctxt)
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{
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assert(NULL != ctxt);
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/* On Matos/SOS, "ctxt" corresponds to the address of the esp register of
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the saved context in Kernel mode (always, even for the interrupted
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context of a user thread). */
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return (vaddr_t)ctxt;
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}
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void cpu_context_dump(const struct cpu_state *ctxt)
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{
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printf("CPU: eip=%x esp=%x eflags=%x cs=%x ds=%x ss=%x err=%x", (unsigned)ctxt->eip,
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(unsigned)ctxt, (unsigned)ctxt->eflags, (unsigned)GET_CPU_CS_REGISTER_VALUE(ctxt->cs),
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(unsigned)ctxt->ds, (unsigned)ctxt->cpl0_ss, (unsigned)ctxt->error_code);
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}
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