2021-10-07 23:54:46 +02:00
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#define ASM_SOURCE 1
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2021-10-25 23:25:31 +02:00
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#include "segment.h"
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2021-10-07 23:54:46 +02:00
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.file "irq_wrappers.S"
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.text
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.extern exception_handler_wrap
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.globl exception_handler_wrapper_array
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2021-10-25 23:25:31 +02:00
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/** Update the kernel TSS in case we are switching to a thread in user
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mode in order to come back into the correct kernel stack */
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.extern cpu_context_update_kernel_tss
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/* The address of the function to call to set back the user thread's
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MMU configuration upon return to user context */
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2021-10-30 13:58:12 +02:00
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.extern threadPrepareExceptionSwitchBack
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2021-10-07 23:54:46 +02:00
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.altmacro
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.macro exception_mac id
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exception_wrapper_\id:
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.type exception_wrapper_\id,@function
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/* INTERRUPT FRAME START */
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/* ALREADY PUSHED TO US BY THE PROCESSOR UPON ENTRY TO THIS INTERRUPT */
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/* uint32_t flags */
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2021-10-26 20:22:10 +02:00
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/* uint32_t cs; */
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/* uint32_t ip */
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/* Pushes the other reg to save same and look like a struct cpu_state*/
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/* Fake error code */
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2021-10-26 20:22:10 +02:00
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pushl $0
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/* Backup the actual context */
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pushl %ebp
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movl %esp, %ebp
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pushl %eax
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pushl %ecx
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pushl %edx
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pushl %ebx
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pushl %esi
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pushl %edi
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subl $2,%esp
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pushw %ss
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pushw %ds
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pushw %es
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pushw %fs
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pushw %gs
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/* Set correct kernel segment descriptors' value */
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movw $BUILD_SEGMENT_REG_VALUE(0, 0, SEG_KDATA), %di
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pushw %di ; popw %ds
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pushw %di ; popw %es
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pushw %di ; popw %fs
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pushw %di ; popw %gs
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push %esp
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pushl $\id
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call exception_handler_wrap
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addl $8, %esp
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/* Reconfigure the MMU if needed */
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pushl %esp /* cpu_ctxt */
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call threadPrepareExceptionSwitchBack
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addl $4, %esp /* Unallocate the stack */
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/* Prepare kernel TSS in case we are switching to a
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user thread: we make sure that we will come back
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into the kernel at a correct stack location */
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pushl %esp /* Pass the location of the context we are
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restoring to the function */
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call cpu_context_update_kernel_tss
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addl $4, %esp
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/* Restore the context */
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popw %gs
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popw %fs
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popw %es
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popw %ds
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popw %ss
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addl $2,%esp
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popl %edi
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popl %esi
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popl %ebx
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popl %edx
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popl %ecx
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popl %eax
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popl %ebp
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/* Remove fake error code */
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addl $4, %esp
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iret
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.endm
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.macro exception_mac_with_errcode id
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exception_wrapper_\id:
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.type exception_wrapper_\id,@function
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/* INTERRUPT FRAME START */
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/* ALREADY PUSHED TO US BY THE PROCESSOR UPON ENTRY TO THIS INTERRUPT */
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/* uint32_t flags */
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/* uint32_t cs; */
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/* uint32_t ip */
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2021-10-30 13:58:12 +02:00
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/* uint32_t errcode */
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2021-10-26 20:22:10 +02:00
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/* Pushes the other reg to save same and look like a struct cpu_state*/
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/* Backup the actual context */
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pushl %ebp
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movl %esp, %ebp
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pushl %eax
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pushl %ecx
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pushl %edx
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pushl %ebx
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pushl %esi
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pushl %edi
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subl $2,%esp
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pushw %ss
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pushw %ds
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pushw %es
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pushw %fs
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pushw %gs
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/* Set correct kernel segment descriptors' value */
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movw $BUILD_SEGMENT_REG_VALUE(0, 0, SEG_KDATA), %di
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pushw %di ; popw %ds
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pushw %di ; popw %es
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pushw %di ; popw %fs
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pushw %di ; popw %gs
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2021-10-25 23:25:31 +02:00
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2021-10-07 23:54:46 +02:00
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push %esp
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pushl $\id
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call exception_handler_wrap
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addl $8, %esp
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2021-10-25 23:25:31 +02:00
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/* Reconfigure the MMU if needed */
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pushl %esp /* cpu_ctxt */
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2021-10-30 13:58:12 +02:00
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call threadPrepareExceptionSwitchBack
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2021-10-25 23:25:31 +02:00
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addl $4, %esp /* Unallocate the stack */
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/* Prepare kernel TSS in case we are switching to a
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user thread: we make sure that we will come back
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into the kernel at a correct stack location */
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pushl %esp /* Pass the location of the context we are
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restoring to the function */
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call cpu_context_update_kernel_tss
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addl $4, %esp
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2021-10-07 23:54:46 +02:00
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/* Restore the context */
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2021-10-26 20:22:10 +02:00
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popw %gs
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popw %fs
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popw %es
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popw %ds
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popw %ss
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addl $2,%esp
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popl %edi
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popl %esi
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popl %ebx
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popl %edx
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popl %ecx
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popl %eax
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popl %ebp
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2021-10-07 23:54:46 +02:00
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2021-10-30 13:58:12 +02:00
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/* Error code isn't compatible with iretd */
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addl $4, %esp
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2021-10-07 23:54:46 +02:00
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iret
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.endm
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2024-02-04 21:42:29 +01:00
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/* List of exception w or w/o err code https://wiki.osdev.org/Exceptions */
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.irp exception_id, 8, 10, 11, 12, 13, 14, 17, 30
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exception_mac_with_errcode exception_id
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.endr
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2021-10-26 20:22:10 +02:00
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.irp exception_id, 0, 1, 2, 3, 4, 5, 6, 7, 9, 15, 16, 18, 19, 20 21, 22, 23, 24, 25, 26, 27, 28, 29, 31
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exception_mac exception_id
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2021-10-07 23:54:46 +02:00
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.endr
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.macro ref_exception_wrapper id
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.long exception_wrapper_\id
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.endm
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.section ".rodata"
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.p2align 5, 0x0
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exception_handler_wrapper_array:
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.set i, 0x0
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.rept 0x20
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ref_exception_wrapper %i
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.set i, i+1
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.endr
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