Add Makefile example
This makefile check file dependecies (.h)
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5c644cfd35/Makefile
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20
Makefile/Makefile
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20
Makefile/Makefile
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CXXFLAGS ?= -Werr -Wall
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program = test
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sources = $(wildcard *.c)
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objects = $(sources:%.c=%.o)
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depends = $(sources:%.c=%.d)
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%.d: %.c
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@$(CPP) $(CPPFLAGS) -c -MP -MM -MT "$@ $*.o" $< >$@
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$(program): $(objects)
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$(CXX) -o $@ $^ $(LDFLAGS) $(LDLIBS)
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.PHONY: clean
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clean:
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rm -f $(program) $(objects) $(depends)
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ifneq ($(MAKECMDGOALS),clean)
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-include $(depends)
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endif
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